• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
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    • 专利摘要:

    公开号:NL1024332A1
    申请号:NL1024332
    申请日:2003-09-19
    公开日:2004-04-02
    发明作者:Wolfgang Dettmann；Josef Mathuni；Oliver Fagerer；Bettina Schiessl；Stephen Rahn
    申请人:Infineon Technologies Ag；
    IPC主号:
    专利说明:

    Photo mask, in particular alternating phase mask, with compensation trick
    The invention relates to a mask, in particular a photomask, for the production of semiconductor devices, as well as a method for the production of masks, in particular for the production of alternating phase shift masks or for the production of chromium-free phase shift masks or phase shift masks which are provided with a structure by means of quartz sets.
    For the production of semiconductor devices, in particular silicon semiconductor devices, so-called photolithographic methods can be used, for example.
    With these methods, firstly, the surface of a corresponding wafer - consisting of monocrystalline silicon - is subjected to an oxidation operation, and then a photosensitive photoresist layer is applied to the oxide layer.
    Subsequently - by interconnecting a suitable optical device - a photo mask is placed above the wafer, the structure of which corresponds to the structure to be applied to the wafer.
    Next, the photomask - and therefore also the corresponding structure on the photoresist - is exposed and then the photomask is removed again.
    When the photoresist is subsequently developed and subjected to an etching operation, the exposed (exposed) positions of the photoresist (and the respective positions of the oxide layer below it) are removed from the wafer - and the unexposed positions remain.
    Through the exposed window, the monocrystalline silicon can now be specifically contaminated, for example by corresponding diffusion or ion implantation methods; For example, n-conducting regions can be obtained by the introduction of pentavalent atoms, e.g., phosphorus, and p-conducting regions can be obtained by the introduction of trivalent atoms, e.g., boron.
    The structures that can be obtained in practice by conventional photolithographic methods can be in a range within the wavelengths of the light used for exposure.
    In order to be able to produce even smaller structures, the so-called alternating phase-shift masks, mentioned here as an example, can be used instead of the usual photomasks, or for example the so-called chromium-free or (other) phase-shift masks which are structured with quartz-etching operations.
    Alternative phase shift masks include, for example, a quartz layer and a layer of chromium that is positioned on top of the quartz layer.
    To produce an alternating phase-shifting mask, first of all, the chromium layer (which is located at the top) is provided - by means of an etching operation, in particular a plasma etching operation - with a structure corresponding to the structure which the wafer must be applied (ie the chrome layer is completely removed at the corresponding positions).
    Then (by means of a further etching operation, in particular a plasma etching operation), and only with every second of the structure lines that are produced, the quartz layer is furthermore removed to a predetermined depth (so that the quartz layer structure thereby produced is at alternatively more or less deep).
    When such a mask is used as a photo mask during the exposure of a silicon wafer, it is possible to ensure that light waves passed through adjacent structure lines - and therefore through correspondingly more or less deep quartz layers - are shifted in their phase by 180 ° with respect to each other, which makes it possible - because of the interference effects between the light waves - to produce correspondingly more limited intensity limits of the wavelengths of the light on the silicon wafer than with the use of the usual photo masks.
    Therefore, relatively narrow or narrow structures can in practice be applied to the silicon wafer by means of an alternating phase-shifting mask.
    However, it is a requirement that - over the entire surface of the alternating phase shift mask - i) the structure line width must have a constant dimension as accurately as possible, and ii) the depth of the structure line must also be as accurate as possible of constant dimension.
    In the prior art, the chromium and quartz layers are completely left behind at the edge regions of the alternating phase shift mask (because hitherto no device needs to be produced in the regions of the wafer that are below the edge regions of the phase shift masks during the later exposure of the alternating phase shift mask, ie these areas do not need to be exposed).
    With the production of the alternating phase shift mask, in particular with the aforementioned etching operations or plasma etching operations, respectively, the respective processing environment for the regions located in the interior of the phase shift mask is therefore different from the regions located near the edge parts.
    These differences in the process environment can, for example, lead to a systematic deviation of the quartz etching operation or the depths of the structure line produced by the aforementioned etching operations or the plasma etching operations, respectively.
    It is now an object of the present invention to provide a new mask, in particular a photo-mask, for the production of semiconductor devices, and a new method for the production of masks, in particular for the production of alternating phase shifts masks, or with chromium-free phase-shift masks or phase-shift masks which, respectively, are structured with a quartz etching operation.
    These, as well as other objects, are achieved by the subjects described in claims 1 and 18.
    Advantageous further embodiments and developments of the invention are described in the subclaims.
    In accordance with a basic idea of the present invention, a mask, in particular a photo-mask, is provided for the production of semiconductor devices comprising at least one product area surface and a compensation structure that is located outside the product area surface, the compensation structure comprising at least one electrically conductive area electrically connected to the product area surface.
    It is a particular advantage when the electrically conductive area extends outwardly, viewed from the product area surface, in the form of a path, namely in particular over the entire width of the compensation structure.
    Due to the electrical connection of the product area surface with an outwardly facing surface of a mask, which is thereby obtained, an electrostatic charge is minimized and an increased continuity of the process conditions during the execution of the etching operations or the plasma etching operations respectively ( this makes it possible to increase the accuracy of the manufacture).
    Preferably, the path (or paths, respectively) of the electrically conductive region has a width that is between 1 µm and 50 µm, in particular between 5 µm and 25 µm, for example about 10 µm.
    By means of the aforementioned compensation structure - and in particular also the additional circuit paths provided - it is prevented that with the aforementioned etching operations, in particular plasma etching operations, the respective process environment is changed for the areas inside the product area surface and for the areas that are close to the edge areas of the product area surface.
    For this reason, the advantage is obtained that - over the entire surface of the alternating phase-shifting mask (or of the product area surface) the structure line width and the structure line depth can each be produced relatively precisely in a constant dimension.
    In the following, the invention will be explained in more detail by means of an embodiment and the accompanying drawing.
    FIG. 1 shows a schematic cross-sectional view of a part of an alternating phase shift mask.
    FIG. 2 shows a schematic top view of the alternating phase shift mask.
    FIG. 3 is a schematic detail view from above of another portion of the alternating phase shift mask shown in FIGS. 1 and 2;
    FIG. 4 is a schematic detailed plan view of the portion of the alternating phase shift mask as shown in FIG. 3, after the manufacture of a chrome lattice;
    FIG. 5 is a schematic detailed plan view of the portion of the alternating phase shift mask as shown in FIGS. 3 and 4, after the additional formation of alternating quartz structures;
    FIG. 6 is a schematic cross-sectional view of a portion of a chromium-free phase shift mask; and
    FIG. 7 shows a schematic cross-sectional view of a part of a CPL phase mask.
    FIG. 1 shows a schematic cross-sectional view of a portion of an alternating phase shift mask 1.
    The alternating phase shift mask 1 consists of two layers, namely a lower quartz layer 2 and a chromium layer 3 which is located on top of the quartz layer 2.
    During the manufacture of the alternating phase-shifting mask 1, the (upper) chromium layer 3 is firstly provided with a structure corresponding to the structure to be provided on the wafer, which will happen at a later time, whereby - by means of an etching operation, in particular a plasma etching operation - the chromium layer 3 is completely removed at the appropriate positions (in this case, for example, see the structure lines 4a, 4b, 4c, 4d, 4e, 4f, as indicated in Fig. 1 and which are situated between the chrome positions that are left behind).
    Subsequently, the quartz layer 2 is etched away by means of a corresponding, further etching operation, in particular a plasma etching operation, as an extra to a predetermined total depth t1, but only at every second of the structure lines 4a, 4b, 4c , 4d, 4th, 4f that are located there.
    With the structure lines 4a, 4b, 4c, 4d, 4e, 4f, the quartz layer 2 therefore alternately exhibits either a - relatively small - total depth t0, or a - relatively large - total depth ti.
    As further indicated in Fig. 1, the structure lines 4a, 4b, 4c, 4d, 4e, 4f, can each have, for example, a width c of about 50 nm - 600 nm, or 100 nm - 250 nm, respectively, the width c - depending on the optical device that will be placed later between a corresponding wafer and the phase shift mask - may correspond, for example, to one-fourth of the width of the circuit paths which must later be applied to the wafer by means of an alternating phase shift mask.
    When the alternating phase mask 1 is applied to the silicon wafer and then exposed, light waves passing through adjacent structure lines 4a, 4b, 4c, 4d, 4e, 4f are obtained - and therefore through correspondingly more or less deep positions of the quartz layer 2 - are rotated over their phase at an angle of 180 ° with respect to each other, whereby it becomes possible that - because of the interference effects between the light waves - intensity limits of correspondingly more sharply limited. the light waves on the silicon wafer can be produced than is possible with the use of the usual photo masks.
    Therefore, relatively narrow or narrow structures can in practice be applied to the silicon wafer by means of the alternating phase-shifting mask 1.
    A requirement here, however, is that - over the entire surface of the alternating phase-shifting mask 1 - the structure line width c and the structure line depths to or ti, respectively, each have a constant dimension as accurately as possible.
    In the present embodiment, this is achieved - as will be described in more detail below - in that a specifically designed compensation structure 5 is provided at the edge areas of the alternating phase shift mask 1, as for example schematically shown in FIG.
    2.
    For example, instead of the alternating phase shift mask 1 as shown in Fig. 1, a chromium-free phase shift mask 1 '- shown in Fig. 6 - or a CPL (chromium-free phase etch lithography) phase shift mask 1' '- as shown in Fig. 7 - each of which, like the alternating phase shift mask 1 as shown in FIG. 1, contains a corresponding compensation structure 5 specifically designed in accordance with the explanation to be given below.
    During the production of the chromium-free phase shift mask 1 'as shown in Fig. 6, first, in accordance with the alternating phase shift mask 1 shown in Fig. 1, an (upper) chromium layer and a quartz layer 2' which is positioned below, provided with a corresponding structure; thereafter, however, contrary to what is done with the alternating phase shift mask 1, the chromium layer is completely removed (on the product area surfaces provided on the chromium-free phase shift mask 1 ').
    Similarly, during the production of the CPL phase shift mask 1 '' as shown in Fig. 7, a (top) chrome layer and a quartz layer 2 '' positioned below it are provided with a corresponding structure, and then the chrome layer becomes full removed on the product area surfaces applied to the CPL phase shift mask 1 ''.
    The structure lines applied to the CPL phase shift mask 1 '' and to the chromium-free phase shift mask 1 'may - in accordance with the alternating phase shift mask 1 - each have, for example, a width c of approximately 50 nm - 600 nm, or 100 nm - 250 respectively nm.
    The distances g between the structure lines are considerably narrower with the CPL phase shift mask 1 '' than with the chromium-free phase shift mask 1 '(for example, the distances g can be in the range of only 50 nm to 200 nm, in particular in the range of 80 nm to 130 nm).
    In accordance with FIG. 2, the compensation structure 5 has a substantially frame-shaped design and is located near the outer edge regions of the alternating phase shift mask 1 (or of the chromium-free phase shift mask 1 'or, respectively, the CPL phase shift mask 1' ' ).
    The compensation structure 5 encloses various product area surfaces 6a, 6b, 6c, 6d, which are provided on the alternating phase shift mask 1.
    The product area surfaces 6a, 6b, 6c, 6d - or the corresponding chromium and quartz layers 2, 3, respectively - are arranged in a manner which is already known per se - and in a manner as described for example in Fig. 1 - with a structure or with structure lines 4a, 4b, 4c, 4d, respectively, such that corresponding devices are produced later during the exposure of the alternating phase shift mask 1, near the areas of the silicon wafer located below the product area surfaces 6a, 6b, 6c, 6d .
    In contrast, the wafer regions on which no devices need to be produced are produced - later - during the exposure of the alternating phase shift mask 1 under the compensation structure 5 located on the edge regions of the phase shift mask.
    FIG. 3 shows a schematic detail view of a portion A of the alternating phase shift mask 1.
    In accordance with Fig. 3, the width b of the compensation structure 5 may vary between, for example, 2 mm and 10 mm, in particular it may be approximately 5 mm, and the distance a between the compensation structure 5 and the corresponding product area surface 6a may, for example, vary between 1 mm and 6 mm, and may in particular be approximately 3 mm.
    As indicated in Fig. 4, during the production of the compensation structure 5 - as will be explained in detail below - the upper chromium layer 3 is firstly processed near the corresponding edge regions of the alternating phase shift mask 1, such that a chromium grating 7 is produced .
    For this purpose, a radiation-sensitive layer, in particular a corresponding resist, is applied to the alternating phase-shift mask 1 in a manner which is already known per se, and this layer is then exposed at the specific positions.
    As shown in Fig. 4, the exposure of the radiation-sensitive layer or of the resin, respectively, is performed on the areas 9a, 9b, which are located between the paths 8a, 8b of the chrome lattice 7 to be produced (for example, here square, alternatively it can also have rectangular (exposed) areas 9a, 9b, which are indicated by the hatch lines in Fig. 4); at the positions of the chrome lattice paths 8a, 8b to be produced, the alternating phase shift mask 1 remains unexposed.
    The length e and / or the width f of the square (or the rectangle, respectively) of the areas to be exposed 9a, 9b can each vary between, for example, 50 µm and 400 µm, in particular between, for example, 100 µm and 300 pm, and may be, for example, 190 pm.
    Then, by means of an etching operation, in particular a plasma etching operation, the radiation-sensitive layer or the resin, respectively, and the chromium layer 3 below it, are completely etched away on the corresponding square exposure areas 9a, 9b, i.e. up to and including the quartz layer 2 located beneath it - the unexposed positions of the alternating phase-shifting mask 1, ie the paths 8a, 8b, of the chrome lattice 7, are thereby left behind.
    With the aforementioned method six steps, the chromium layer 3 is provided - simultaneously - in a manner known per se and in a manner as described above in connection with Fig. 1, with a corresponding structure (which serves to produce corresponding devices) at the respective positions of the product area surfaces 6a, 6b, 6c, 6d (by the resin that is exposed in a corresponding manner, and - by means of the aforementioned etching operations, in particular a plasma etching operation - the chromium layer 3 becomes complete removed at the corresponding positions).
    In contrast, the resin is not exposed on the intermediate area 10 which is located between the area of the compensation structure 5 and the product area surfaces 6a, 6b, 6c, 6d, ie this remains during the aforementioned etching operations, in particular a plasma etching operation.
    By means of the paths 8a, 8b, of the chrome grid 7, a conductive outwardly directed connection of the product area surfaces 6a, 6b, 6c, 6d, in particular with the edge areas of the phase shift mask, is provided (by interconnection of the intermediate area 10); in particular, it must be prevented that the product area surfaces 6a, 6b, 6c, 6d are electrically insulated to the outside by the compensation structure 5.
    For this purpose, a - correspondingly high - number of chromium paths 8a, 8b extending outwardly from the product area surfaces 6a, 6b, 6c, 6d, or the intermediate surface 10, respectively, is formed (e.g. - with respect to Fig. 2 - more than 10, in particular more than 100, 1,000 or 10,000 chrome paths 8a, 8b extending from both the upper, lower, right and left partial parts 10a, 10b, 10c, 10d, of the intermediate surface 10, outwards in the direction of the top, bottom, right and left).
    The paths 8a, 8b of the chrome lattice 7 may, for example, each have a - constant - width d of about 1 µm - 50 µm, in particular 5 µm - 25 µm, e.g. 10 µm (ie the width d of the chrome lattice pads 8a, 8b provided on the surface of the compensation structure 5 can be substantially greater than the width c of the structures or structure lines 4a, 4b, 4c, 4d, 4e, 4f, respectively, which are provided on the product area surfaces 6a, 6b, 6c, 6d).
    After - in the manner described above - the alternating phase-shifting mask 1 is provided with the aforementioned chromium lattice 7 in the compensation structure surface 5, the quartz layer 2 is processed, as shown in Fig. 5, and this will be described in more detail below .
    In a manner known per se, a radiation-sensitive layer, in particular a suitable resin, is reapplied to the alternating phase-shifting mask 1, and this whole is subsequently exposed at the specific positions.
    As indicated in Fig. 5, the exposure of the radiation-sensitive layer or of the resin, respectively, is only performed on certain areas of the square (exposed) areas 9b, which are located between the paths 8a, 8b of the chrome lattice 7 (provided with hatching lines in Fig. 5); the remaining square areas 9a that are located between the paths 8a, 8b of the chrome lattice 7 and the chrome lattice paths 8a, 8b are not illuminated.
    In particular, in a row 11 formed by several square areas 9b positioned side by side, only each second square area 9b is exposed or, respectively, in each second column 12b formed by several square areas 9b each of which are positioned with each other, all square areas 9b that are in the respective column 12b are illuminated (in the remaining columns 12a none of the square areas 9a that are in the respective column 12a is illuminated).
    Subsequently - by means of an etching operation, in particular a plasma etching operation - the radiation-sensitive layer or the resist, respectively, and the quartz layer 2 situated beneath it, are etched away on the exposed square areas 9b to the aforementioned desired total depth ti (ie corresponding as deep as the corresponding positions in the product area surfaces 6a, 6b, 6c, 6d (see below)) - the unexposed positions of the alternating phase shift mask 1, ie the paths 8a, 8b of the chrome grid 7, and the unexposed square areas 9a are left behind.
    With the aforementioned process steps, the quartz layer 2 is etched away - simultaneously - in a manner known per se and in a manner as described above in connection with Fig. 1, at the corresponding positions of the product area surfaces 6a, 6b, 6c, 6d, ie at every second of the structure lines 4a, 4b, 4c, 4d, 4e, 4f, which are provided - and correspondingly as deep as the compensation structure areas - up to the aforementioned predetermined total depth ti (by the resin which becomes correspondingly exposed and the aforementioned etching operation, in particular a plasma etching operation, which is subsequently performed).
    In contrast, the resin is not exposed on the intermediate area 10 which is located between the surface of the compensation structure 5 and the product area surfaces 6a, 6b, 6c, 6d, ie this portion remains behind during the aforementioned etching operation, in particular during the aforementioned etching operation. plasma etching operation.
    Because the paths 8a, 8b of the chrome grid 7 - as already mentioned above - are not etched away, the conductive, outward-facing connections of the product area surfaces 6a, 6b, 6c, 6d, in particular with the edge regions of the phase shift mask provided by these paths (through an interconnection of the intermediate surface 10) behind.
    By means of the - frame-shaped - compensation structure 5, charge effects obtained with the aforementioned etching operations, in particular with plasma etching operations, can be reduced.
    In particular, the compensation structure 5 prevents - and in particular also the chrome grid 7 that is additionally provided there - that, with the aforementioned etching operations, in particular plasma etching operations, the respective process environment - for the areas that are positioned in the interior of the respective product area surfaces 6a, 6b, 6c, 6d, differs from the environment of the areas positioned near the edge areas of the product area surfaces 6a, 6b, 6c, 6d.
    For this reason it is obtained that - over the entire surface of the alternating phase-shift mask 1 or of the product area surfaces 6a, 6b, 6c, 6d, respectively - the structure line width c and the structure line depths t0 or ti, respectively, each have a constant dimension as accurately as possible .
    By means of the electrical connection - obtained through the chrome grid 7 - from the product area surfaces 6a, 6b, 6c, 6d, to a surface 13 of the phase-shifting mask 1 (which surface is located at the outermost edge, around the chrome grid 7 ), an electrostatic charge is minimized, and a further increase in the continuity of the process conditions during the processing of the etching processes, in particular the plasma etching processes, is obtained (this makes it possible to further increase the accuracy of the production).
    By the correct choice of, for example, the number of and / or the width d of the paths 8a, 8b, of the chrome grid 7, and / or the number and / or the size of the square or rectangular (exposed) areas 9a, 9b, and / or the width b of the compensation structure 5, and / or the distance a between the compensation structure 5 and the corresponding product area-surface 6a, etc., the aforementioned method can be optimized in a suitable manner, and can, for example, be optimally be adapted to the mask type to be edited.
    权利要求:
    Claims (18)
    [1]
    A mask (1), in particular a photomask, for the production of semiconductor devices, comprising at least one product area surface (6a) and a compensation structure (5) located outside the product area surface (6a), characterized in that the compensation structure (5) comprises at least one electrically conductive area (8b) electrically connected to the product area surface (6a).
    [2]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 1, wherein - viewed from the product area surface (6a) - the electrically conductive area (8b) extends outward pathwise.
    [3]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 1 or 2, wherein the path (8b) of the electrically conductive region has a width (d) that is between 1 nm and 30 mm or between 200 m and 5 mm, respectively, in particular between 1 µm and 50 µm, for example between 5 µm and 25 µm.
    [4]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claims 1, 2, or 3, wherein the electrically conductive region (8b) extends substantially over the entire width (b) of the compensation structure (5).
    [5]
    Mask (1), in particular a photomask, for the production of semiconductor devices, according to one of the preceding claims, comprising a plurality of, in particular more than 10, 100, 1,000 or 10,000, electrically conductive regions ( 8a, 8b) electrically connected to the product area surface (6a).
    [6]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 5, wherein - viewed from the product area surface (6a) - the electrically conductive areas (8a, 8b) extend pathwise extend to it.
    [7]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 5 or 6, wherein the plurality of electrical regions (8a, 8b) form a lattice structure.
    [8]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to any of the preceding claims, wherein the electrically conductive region (s) (8a, 8b) is (are) made of chrome.
    [9]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to one of claims 5 to 8, wherein electrically non-conductive regions (9a, 9b) are located between the electrically conductive regions ( 8a, 8b).
    [10]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 9, wherein at least two non-conductive regions (9a, 9b) have different depths (t0, ti).
    [11]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 10, wherein a respective plurality of electrically non-conductive regions (9a, 9b) positioned side by side, in particular more than 3, 50, or 500 electrically non-conductive regions (9a, 9b) that are positioned side by side, alternately having different depths (t 0, t 1), respectively.
    [12]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to any of claims 9 to 11, wherein the electrically non-conductive regions (9a, 9b) are made of quartz.
    [13]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to one of claims 9 to 12, wherein the electrically non-conductive regions (9a, 9b) are located between the electrically conductive regions (8a, 8b) have a rectangular, in particular a square, or a round or oval, respectively, cross-section.
    [14]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to any one of the preceding claims, wherein the compensation structure (5) is formed around the at least one, or around the at least one and around further, product area surfaces (6a, 6b).
    [15]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to claim 14, wherein the compensation structure (5) is frame-shaped.
    [16]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to any one of the preceding claims, wherein the mask comprises a quartz and / or a chromium layer (2, 3).
    [17]
    A mask (1), in particular a photomask, for the production of semiconductor devices, according to any one of the preceding claims, wherein the mask (1) is an alternating phase-shifting mask, or a chromium-free or a CPL (chromium-free phase etch lithography) mask , respectively.
    [18]
    18. Method for the production of masks, in particular for the production of alternating phase-shift masks, or of chromium-free phase-shift masks or phase-shift masks which are structured by quartz sets, respectively, comprising at least one product area surface (6a) and a compensation structure ( 5) located outside the product area surface (6a), characterized in that the method comprises the step of providing the compensation structure (5) of at least one electrically conductive area (8b) which - in the final state of the mask - is electrically connected to the product area surface (6a).
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    法律状态:
    2004-06-01| AD1A| A request for search or an international type search has been filed|
    2009-09-01| EDI| The registered patent application has been withdrawn|
    优先权:
    申请号 | 申请日 | 专利标题
    DE10245159|2002-09-27|
    DE2002145159|DE10245159B4|2002-09-27|2002-09-27|Photomask, in particular alternating phase mask, with compensation structure|
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